发明授权
US06759750B2 Method for integrating low-K materials in semiconductor fabrication 失效
半导体制造中低K材料的集成方法

  • 专利标题: Method for integrating low-K materials in semiconductor fabrication
  • 专利标题(中): 半导体制造中低K材料的集成方法
  • 申请号: US10623910
    申请日: 2003-07-18
  • 公开(公告)号: US06759750B2
    公开(公告)日: 2004-07-06
  • 发明人: Shau-Lin ShueMing-Hsing Tsai
  • 申请人: Shau-Lin ShueMing-Hsing Tsai
  • 主分类号: H01L2348
  • IPC分类号: H01L2348
Method for integrating low-K materials in semiconductor fabrication
摘要:
A method for integrating low-K materials in semiconductor fabrication. The process begins by providing a semiconductor structure having a dielectric layer thereover, wherein the dielectric layer comprising an organic low-K material. The dielectric layer is patterned to form pillar openings. A pillar layer is deposited over the semiconductor structure; thereby filling the pillar openings with the pillar layer. The pillar layer is planarized to form pillars embedded in said dielectric layer. The pillar layer comprises a material having good thermal stability, good structural strength, and good bondability of spin coating back-end materials, improving the manufacturability of organic, low-K dielectrics in semiconductor fabrication. In one embodiment, the pillars are formed prior to forming dual damascene interlayer contacts. In another embodiment, pillars are formed simultaneously with interlayer contacts.
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