公开(公告)号：US08785321B2

公开(公告)日：2014-07-22

申请号：US13249823

申请日：2011-09-30

申请人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

发明人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

IPC分类号： H01L21/4763

CPC分类号： H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and system is provided for efficiently varying the composition of the metal interconnects for a semiconductor device. A metal interconnect according to the present disclosure has an intermediate layer on a dielectric material, the intermediate layer having a relatively higher concentration of an impurity metal along with a primary metal, the impurity metal having a lower reduction potential than the primary metal. The metal interconnect has a main layer of the metal alloy interconnect on top of the intermediate layer and surrounded by the intermediate layer, the main layer having a relatively higher concentration of the primary metal than the intermediate layer, wherein the intermediate and main layers of the metal alloy interconnect each maintains a material uniformity.

摘要翻译： 提供了一种方法和系统，用于有效地改变半导体器件的金属互连的组成。 根据本公开的金属互连在电介质材料上具有中间层，中间层与主金属一起具有较高浓度的杂质金属，杂质金属具有比初级金属低的还原电位。 金属互连件在中间层的顶部具有金属合金互连的主层，被中间层包围，主层具有比中间层更高的一次金属浓度，其中，中间层和中间层的中间层和主要层 金属合金互连件均保持材料均匀性。

公开(公告)号：US07544281B2

公开(公告)日：2009-06-09

申请号：US11119183

申请日：2005-04-28

申请人： Ming-Wei Lin ,  Ming-Hsing Tsai

发明人： Ming-Wei Lin ,  Ming-Hsing Tsai

IPC分类号： C25D5/02

CPC分类号： C25D17/06 ,  C25D5/18 ,  C25D7/123 ,  C25D17/001 ,  C25D17/005 ,  H01L21/2885

摘要： An electrochemical plating apparatus and method for facilitating uniform current distribution across a wafer during loading into an ECP (electrochemical plating) apparatus is disclosed. The apparatus includes a bath container for containing a bath solution, an anode provided in the bath container, a cathode ring for supporting a wafer in the bath container and a current source electrically connected to the anode and the cathode ring. According to the method, a voltage potential is applied to the cathode ring as it is immersed into the solution and prior to immersion of the wafer in the solution, thereby facilitating a substantially uniform plating current across the wafer upon immersion of the wafer.

摘要翻译： 公开了一种用于在装载到ECP（电化学电镀）装置中时促进在晶片上均匀分布电流的电化学电镀装置和方法。 该装置包括用于容纳浴溶液的浴容器，设置在浴容器中的阳极，用于在浴容器中支撑晶片的阴极环和与阳极和阴极环电连接的电流源。 根据该方法，当阴极环浸入溶液中并且在将晶片浸入溶液之前，电压电势被施加到阴极环上，从而有助于在晶片浸入时跨晶片的基本均匀的电镀电流。

公开(公告)号：US07235482B2

公开(公告)日：2007-06-26

申请号：US10657505

申请日：2003-09-08

申请人： Chii-Ming Wu ,  Ming-Hsing Tsai ,  Ching-Hua Hsieh ,  Shau-Lin Shue

发明人： Chii-Ming Wu ,  Ming-Hsing Tsai ,  Ching-Hua Hsieh ,  Shau-Lin Shue

IPC分类号： H01L21/44

CPC分类号： H01L21/76877 ,  H01L21/28562 ,  H01L23/53261 ,  H01L2924/0002 ,  H01L2924/00

摘要： An atomic layer deposition method is used to deposit a TiN or TiSiN film having a thickness of about 50 nm or less on a substrat. A titanium precursor which is tetrakis(dimethylamido)titanium (TDMAT), tetrakis(diethylamido)titanium (TDEAT), or Ti{OCH(CH3)2}4 avoids halide contamination from a titanium halide precursor and is safer to handle than a titanium nitrate. After a monolayer of the titanium precursor is deposited on a substrate, a nitrogen containing reactant is introduced to form a TiN monolayer which is followed by a second purge. For TiSiN, a silicon source gas is fed into the process chamber after the TiN monolayer formation. The process is repeated several times to produce a composite layer comprised of a plurality of monolayers that fills a contact hole. The ALD method is cost effective and affords an interconnect with lower impurity levels and better step coverage than conventional PECVD or CVD processes.

摘要翻译： 使用原子层沉积方法在基底上沉积厚度约为50nm或更小的TiN或TiSiN膜。 作为四（二甲基氨基）钛（TDMAT），四（二乙基氨基）钛（TDEAT）或Ti（OCH 2 CH 3）2） 4避免了来自卤化钛前体的卤化物污染，并且比硝酸钛更安全。 将钛前体的单层沉积在基底上之后，引入含氮反应物以形成TiN单层，随后进行第二次吹扫。 对于TiSiN，在TiN单层形成之后，将硅源气体进料到处理室中。 该过程重复几次以产生由填充接触孔的多个单层组成的复合层。 ALD方法具有成本效益，并且提供了比常规PECVD或CVD工艺更低的杂质水平和更好的阶梯覆盖的互连。

公开(公告)号：US20070096326A1

公开(公告)日：2007-05-03

申请号：US11261200

申请日：2005-10-28

申请人： Hui-Lin Chang ,  Yung-Cheng Lu ,  Chung-Chi Ko ,  Pi-Tsung Chen ,  Shau-Lin Shue ,  Chien-Hsueh Shih ,  Hung-Wen Su ,  Ming-Hsing Tsai

发明人： Hui-Lin Chang ,  Yung-Cheng Lu ,  Chung-Chi Ko ,  Pi-Tsung Chen ,  Shau-Lin Shue ,  Chien-Hsueh Shih ,  Hung-Wen Su ,  Ming-Hsing Tsai

IPC分类号： H01L23/48

CPC分类号： H01L23/53276 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76879 ,  H01L21/76885 ,  H01L23/5226 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

摘要： Semiconductor devices and methods for fabricating the same. The devices include a substrate, a catalyst layer, a second dielectric layer, and carbon nanotubes (CNTs). The substrate comprises an overlying first dielectric layer with an electrode embedded therein. The catalyst layer overlies the electrode and the first dielectric layer and substantially comprises Co and M1, wherein M1 is selected from a group consisting of W, P, B, Bi, Ni, and a combination thereof. The second dielectric layer overlies the catalyst layer and comprises an opening exposing parts of the catalyst layer. The carbon nanotubes (CNTs) are disposed on the exposed catalyst layer and electrically connect the electrode.

摘要翻译： 半导体器件及其制造方法。 这些器件包括衬底，催化剂层，第二介电层和碳纳米管（CNT）。 衬底包括具有嵌入其中的电极的上覆的第一介电层。 催化剂层覆盖电极和第一介电层，并且基本上包括Co和M 1，其中M 1选自W，P，B，Bi ，Ni及其组合。 第二电介质层覆盖在催化剂层上并且包括露出催化剂层的部分的开口。 碳纳米管（CNT）设置在暴露的催化剂层上并电连接电极。

公开(公告)号：US20070054488A1

公开(公告)日：2007-03-08

申请号：US11341827

申请日：2006-01-27

申请人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

发明人： Ting-Chu Ko ,  Ming-Hsing Tsai ,  Chien-Hsueh Shih

IPC分类号： H01L21/4763

CPC分类号： H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method and system is provided for efficiently varying the composition of the metal interconnects for a semiconductor device. A metal interconnect according to the present disclosure has an intermediate layer on a dielectric material, the intermediate layer having a relatively higher concentration of an impurity metal along with a primary metal, the impurity metal having a lower reduction potential than the primary metal. The metal interconnect has a main layer of the metal alloy interconnect on top of the intermediate layer and surrounded by the intermediate layer, the main layer having a relatively higher concentration of the primary metal than the intermediate layer, wherein the intermediate and main layers of the metal alloy interconnect each maintains a material uniformity.

摘要翻译： 提供了一种方法和系统，用于有效地改变半导体器件的金属互连的组成。 根据本公开的金属互连在电介质材料上具有中间层，中间层与主金属一起具有较高浓度的杂质金属，杂质金属具有比初级金属低的还原电位。 金属互连件在中间层的顶部具有金属合金互连的主层，被中间层包围，主层具有比中间层更高的一次金属浓度，其中，中间层和中间层的中间层和主要层 金属合金互连件均保持材料均匀性。

公开(公告)号：US20070048991A1

公开(公告)日：2007-03-01

申请号：US11209891

申请日：2005-08-23

申请人： Chien-Hsueh Shih ,  Ming-Hsing Tsai ,  Hung-Wen Su

发明人： Chien-Hsueh Shih ,  Ming-Hsing Tsai ,  Hung-Wen Su

IPC分类号： H01L21/44

CPC分类号： H01L21/76849 ,  H01L21/76883

摘要： Copper interconnect structures for interconnection. The interconnect structure has a copper recess in a damascene structure with copper filled in a via/trench of a dielectric layer. Furthermore, the interconnect structure can also have a metal cap filled the copper recess.

摘要翻译： 用于互连的铜互连结构。 互连结构具有镶嵌结构中的铜凹槽，铜填充在电介质层的通孔/沟槽中。 此外，互连结构还可以具有填充铜凹部的金属盖。

公开(公告)号：US20060199379A1

公开(公告)日：2006-09-07

申请号：US11071104

申请日：2005-03-04

申请人： Ming-Shih Yeh ,  Ming-Hsing Tsai ,  Shau-Lin Shue ,  Chen-Hua Yu

发明人： Ming-Shih Yeh ,  Ming-Hsing Tsai ,  Shau-Lin Shue ,  Chen-Hua Yu

IPC分类号： H01L21/4763 ,  H01L21/31

CPC分类号： H01L21/76804 ,  H01L21/31144 ,  H01L21/314 ,  H01L21/76808 ,  Y10S438/978

摘要： The manufacture of damascene structures having improved performance, particularly, but not by way of limitation, dual damascene structures is provided. In one embodiment, a substrate having a conductive layer is formed in a first insulating layer. A protective layer is formed above the conductive layer. An etching stop layer is formed above the protective layer and the first insulating layer. A second insulating layer is formed above the etching stop layer. A first patterned photoresist layer is formed above the second insulating layer, the first patterned photoresist layer having a first pattern. The first pattern is etched into the second insulating layer and the etching stop layer to form a first opening. A via plug is filled at least partially in the first opening. An anti-reflective coating (ARC) layer is formed above the second insulating layer. A second patterned photoresist layer is formed above the ARC layer, the second photoresist layer having a second pattern. The second pattern is etched into portions of the via plug, second insulation layer, and the ARC layer to form a second opening, wherein a substantially tapered sidewall portion is formed at the interface of the first and second openings.

摘要翻译： 提供了具有改进的性能，特别但非限制性的双镶嵌结构的镶嵌结构的制造。 在一个实施例中，具有导电层的衬底形成在第一绝缘层中。 在导电层上形成保护层。 在保护层和第一绝缘层上方形成蚀刻停止层。 在蚀刻停止层上形成第二绝缘层。 第一图案化光致抗蚀剂层形成在第二绝缘层之上，第一图案化光致抗蚀剂层具有第一图案。 将第一图案蚀刻到第二绝缘层和蚀刻停止层中以形成第一开口。 通孔插塞至少部分地填充在第一开口中。 在第二绝缘层上方形成抗反射涂层（ARC）层。 第二图案化光致抗蚀剂层形成在ARC层上方，第二光致抗蚀剂层具有第二图案。 第二图案被蚀刻到通孔塞，第二绝缘层和ARC层的部分中以形成第二开口，其中在第一和第二开口的界面处形成大致锥形的侧壁部分。

公开(公告)号：US20060196775A1

公开(公告)日：2006-09-07

申请号：US11072137

申请日：2005-03-04

申请人： Hung-Wen Su ,  Ming-Hsing Tsai

发明人： Hung-Wen Su ,  Ming-Hsing Tsai

IPC分类号： C25D3/00 ,  C25D17/04

CPC分类号： C25D17/001 ,  C25D17/005 ,  H01L21/2885 ,  H01L21/76841

摘要： Methods and apparatuses for electrochemically depositing a metal layer onto a substrate. An electrochemical deposition apparatus comprises a substrate holder assembly including a substrate chuck and a relatively soft cathode contact ring. The cathode contact ring comprises an inner portion and an outer portion, wherein the inner portion directly contacts the substrate. An anode is disposed in an electrolyte container. A power supply connects the substrate holder assembly and the anode.

公开(公告)号：US20050245072A1

公开(公告)日：2005-11-03

申请号：US10833154

申请日：2004-04-28

申请人： Hsien-Ming Lee ,  Jing-Cheng Lin ,  Shing-Chyang Pan ,  Ming-Hsing Tsai ,  Hung-Wen Su ,  Shih-Wei Chou ,  Shau-Lin Shue ,  Kuo-Wei Cheng ,  Ting-Chu Ko

发明人： Hsien-Ming Lee ,  Jing-Cheng Lin ,  Shing-Chyang Pan ,  Ming-Hsing Tsai ,  Hung-Wen Su ,  Shih-Wei Chou ,  Shau-Lin Shue ,  Kuo-Wei Cheng ,  Ting-Chu Ko

IPC分类号： H01L21/288 ,  H01L21/4763 ,  H01L21/76 ,  H01L21/768

CPC分类号： H01L21/2885 ,  H01L21/76843 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76873 ,  H01L21/76877

摘要： A method of electrochemical deposition (ECD) provides a barrier and a seed layer on a substrate. The surfaces of the substrate are pre-treated before a metal layer is electrochemically deposited thereon in an electrochemical plating cell with a physical or a chemical surface treatment process. The electrochemical plating cell is covered by a cap to prevent evaporation of the electrolyte solution. The electrochemical plating cell includes a substrate holder assembly with a lift seal, e.g., with a contact angle θ less than 90° between the lift seal and the substrate. The substrate holder assembly includes a substrate chuck at the rear side of the substrate.

摘要翻译： 电化学沉积（ECD）的方法在衬底上提供阻挡层和种子层。 在将金属层电化学沉积在具有物理或化学表面处理工艺的电化学镀覆电池中之前，对基板的表面进行预处理。 电化学镀覆电池被盖覆盖以防止电解质溶液的蒸发。 电化学电镀单元包括具有提升密封件的衬底保持器组件，例如在提升密封件和衬底之间的接触角θ小于90°。 衬底保持器组件包括在衬底的后侧的衬底卡盘。

公开(公告)号：US20050211379A1

公开(公告)日：2005-09-29

申请号：US10810619

申请日：2004-03-29

申请人： Hung-Wen Su ,  Ming-Hsing Tsai

发明人： Hung-Wen Su ,  Ming-Hsing Tsai

IPC分类号： B44C1/22

CPC分类号： H01L21/32134 ,  C23F1/08 ,  H01L21/67057

摘要： Apparatus and method for removing copper from wafer edge. The apparatus of the invention includes a bath tank for containing a chemical bath, a rotatable wafer chuck for holding a wafer vertical to the chemical bath, wherein at least the edge of the wafer is covered with a metal layer, and a sliding element is disposed on one end of the rotatable wafer chuck such that the rotatable wafer chuck can move in a vertical direction to the chemical bath.

摘要翻译： 从晶片边缘去除铜的装置和方法。 本发明的装置包括用于容纳化学浴液的浴槽，用于将晶片垂直于化学浴保持的可旋转晶片卡盘，其中晶片的至少边缘被金属层覆盖，并且设置滑动元件 在可旋转的晶片卡盘的一端上，使得可旋转的晶片卡盘可以在垂直方向上移动到化学浴槽。