Invention Grant
- Patent Title: Electronic device manufacturing method
- Patent Title (中): 电子元件制造方法
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Application No.: US09985051Application Date: 2001-11-01
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Publication No.: US06764585B2Publication Date: 2004-07-20
- Inventor: Tetsuo Matsuda , Hiroshi Toyoda , Hisashi Kaneko
- Applicant: Tetsuo Matsuda , Hiroshi Toyoda , Hisashi Kaneko
- Priority: JP2000-336194 20001102
- Main IPC: B05D512
- IPC: B05D512

Abstract:
An electronic device manufacturing method comprises forming an insulating film above a substrate, forming a to-be-filled region which includes at least one of an interconnection groove and a hole in the insulating film, forming a first conductive film containing a catalyst metal which accelerates electroless plating, so as to line an internal surface of the to-be-filled region, forming a second conductive film on the first conductive film by the electroless plating, so as to line the internal surface of the to-be-filled region via the first conductive film, and forming a third conductive film on the second conductive film by electroplating, so as to fill the to-be-filled region via the first conductive film and the second conductive film.
Public/Granted literature
- US20020050459A1 Electronic device manufacturing method Public/Granted day:2002-05-02
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