发明授权
US06766210B2 Process error prevention method in semiconductor fabricating equipment
有权
半导体制造设备中的过程误差预防方法
- 专利标题: Process error prevention method in semiconductor fabricating equipment
- 专利标题(中): 半导体制造设备中的过程误差预防方法
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申请号: US10222852申请日: 2002-08-19
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公开(公告)号: US06766210B2公开(公告)日: 2004-07-20
- 发明人: Tae-Ha Jun , Hee-Sun Chae , Kyung-Bo Sim , Jong-Hwan Weon
- 申请人: Tae-Ha Jun , Hee-Sun Chae , Kyung-Bo Sim , Jong-Hwan Weon
- 优先权: KR10-2001-0061398 20011005
- 主分类号: G06F1900
- IPC分类号: G06F1900
摘要:
A method for preventing process errors in a semiconductor fabricating process allows only a few authorized engineers to release interlocks of semiconductor fabricating equipment when a count of interlock occurrences exceeds a predetermined number within a predetermined period of time. By allowing a semiconductor fabricating equipment operator only limited ability to reset equipment interlocks, repeated interlock conditions caused by test specification failures may be over-ridden only a predetermined number of times before the semiconductor fabricating equipment is disabled completely. The disabled semiconductor fabricating equipment may only be re-enabled using an authorization code, which is only made available to selected personnel, thereby ensuring that necessary repairs and corrections have been implemented on the semiconductor fabricating equipment.
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