发明授权
- 专利标题: Parallel programming of programmable logic using register chains
- 专利标题(中): 使用寄存器链的可编程逻辑的并行编程
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申请号: US10106675申请日: 2002-03-25
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公开(公告)号: US06766505B1公开(公告)日: 2004-07-20
- 发明人: Gopi Rangan , Khai Nguyen , Chiakang Sung , Xiaobao Wang , In Whan Kim , Yan Chong , Philip Pan , Joseph Huang , Bonnie Wang
- 申请人: Gopi Rangan , Khai Nguyen , Chiakang Sung , Xiaobao Wang , In Whan Kim , Yan Chong , Philip Pan , Joseph Huang , Bonnie Wang
- 主分类号: G06F1750
- IPC分类号: G06F1750
摘要:
Techniques and circuitry are used to more rapidly configuring programmable integrated circuits. Configuration data is input into a programmable integrated circuit in parallel via parallel inputs (705), and this data is also handled internally in parallel. The configuration data will be stored in a data register (722). This data register includes two or more serial register chains, each chain being made up of a serial chain of registers. The configuration data is input into the two of more chains of the data registers in parallel. Circuitry is also provided to handle redundancy.