- 专利标题: Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations
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申请号: US10351179申请日: 2003-01-24
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公开(公告)号: US06850438B2公开(公告)日: 2005-02-01
- 发明人: Peter W. Lee , Fu-Chang Hsu , Hsing-Ya Tsao , Han-Rei Ma
- 申请人: Peter W. Lee , Fu-Chang Hsu , Hsing-Ya Tsao , Han-Rei Ma
- 申请人地址: US CA San Jose
- 专利权人: Aplus Flash Technology, Inc.
- 当前专利权人: Aplus Flash Technology, Inc.
- 当前专利权人地址: US CA San Jose
- 代理商 George O. Saile; Stephen B. Ackerman
- 主分类号: G11C16/04
- IPC分类号: G11C16/04 ; G11C16/14 ; H01L21/8247 ; H01L27/115
摘要:
A combination EEPROM and Flash memory is described containing cells in which the stacked gate transistor of the Flash cell is used in conjunction with a select transistor to form an EEPROM cell. The select transistor is made sufficiently small so as to allow the EEPROM cells to accommodate the bit line pitch of the Flash cell, which facilitates combining the two memories into memory banks containing both cells. The EEPROM cells are erased by byte while the Flash cells erased by block. The small select transistor has a small channel length and width, which is compensated by increasing gate voltages on the select transistor and pre-charge bitline during CHE program operation.
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