发明授权
- 专利标题: Status scheme signal processing circuit
- 专利标题(中): 状态方案信号处理电路
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申请号: US10388497申请日: 2003-03-17
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公开(公告)号: US06856166B2公开(公告)日: 2005-02-15
- 发明人: Kenji Sakai , Yoshikazu Tanaka
- 申请人: Kenji Sakai , Yoshikazu Tanaka
- 申请人地址: JP Tokyo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址: JP Tokyo
- 代理机构: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
- 优先权: JPP2002-286063 20020930
- 主分类号: H03K5/1532
- IPC分类号: H03K5/1532 ; G06F7/38 ; H03K5/04 ; H03K5/135 ; H03K5/153 ; H03K19/00 ; H03K19/173
摘要:
In a status scheme signal processing circuit which obtains a desired output signal on the basis of an OR signal between a pulse output from a one-shot pulse circuit at an edge of an input signal and a status signal, since the input signal and the status signal are not synchronized with each other, the output timing of the output signal changes depending on the timing of the input signal. Therefore, in the present invention, a mask signal generator which outputs a mask signal having a predetermined bandwidth T1 in response to a signal leading edge and a signal trailing edge of the input signal, and said desired output signal is masked (disabled) with the mask signal, so that an output signal is always obtained a predetermined period (T1) after the input timing of the input signal.
公开/授权文献
- US20040061529A1 Status scheme signal processing circuit 公开/授权日:2004-04-01
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