发明授权
US06856166B2 Status scheme signal processing circuit 有权
状态方案信号处理电路

Status scheme signal processing circuit
摘要:
In a status scheme signal processing circuit which obtains a desired output signal on the basis of an OR signal between a pulse output from a one-shot pulse circuit at an edge of an input signal and a status signal, since the input signal and the status signal are not synchronized with each other, the output timing of the output signal changes depending on the timing of the input signal. Therefore, in the present invention, a mask signal generator which outputs a mask signal having a predetermined bandwidth T1 in response to a signal leading edge and a signal trailing edge of the input signal, and said desired output signal is masked (disabled) with the mask signal, so that an output signal is always obtained a predetermined period (T1) after the input timing of the input signal.
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