发明授权
US06873506B2 System and method for electrostatic discharge protection using lateral PNP or PMOS or both for substrate biasing
有权
使用横向PNP或PMOS或两者用于衬底偏置的静电放电保护的系统和方法
- 专利标题: System and method for electrostatic discharge protection using lateral PNP or PMOS or both for substrate biasing
- 专利标题(中): 使用横向PNP或PMOS或两者用于衬底偏置的静电放电保护的系统和方法
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申请号: US10655865申请日: 2003-09-05
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公开(公告)号: US06873506B2公开(公告)日: 2005-03-29
- 发明人: Zhiliang Julian Chen , Thomas A. Vrotsos , Ajith E. Amerasekera
- 申请人: Zhiliang Julian Chen , Thomas A. Vrotsos , Ajith E. Amerasekera
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Yingsheng Tung; Wade James Brady, III; Frederick J. Telecky, Jr.
- 主分类号: H01L27/04
- IPC分类号: H01L27/04 ; H01L21/822 ; H01L27/02 ; H01L27/06 ; H02H9/00
摘要:
The invention comprises a system and method for providing electrostatic discharge protection. In one embodiment of the invention, an integrated circuit (10) comprising at least one input element (20) is protected by a protective circuit (40). The protective circuit (40) is operable to protect the integrated circuit (10) from damage due to electrostatic discharge and may be coupled to the input element (20). The protective circuit (40) comprises a lateral NPN transistor (T1) coupled to the input element (20) and operable to activate when the input element voltage exceeds threshold, the threshold greater than or equal to the ordinary operating voltage of circuitry coupled to the input element (20). The protective circuit (40) also may comprise a lateral PNP transistor (T2) coupled to the input element (20) and to the lateral NPN transistor (T1). The lateral PNP transistor (T2) is operable to aid in raising a potential of the base of the lateral NPN transistor (T1). Alternatively, the protective circuit (40) also may use a PMOS transistor (P1), or a PMOS transistor (P1) in combination with the lateral NPN transistor (T1), coupled to the input element (20) and to the lateral NPN transistor (T1). The PMOS transistor (P1) is operable to aid in raising the potential of the base of the lateral NPN transistor (T1).
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