发明授权
US06879183B2 Programmable logic device architectures with super-regions having logic regions and a memory region 有权
具有逻辑区域和存储区域的超区域的可编程逻辑器件架构

Programmable logic device architectures with super-regions having logic regions and a memory region
摘要:
A programmable logic device has a plurality of super-regions of programmable circuitry disposed on the device in a two-dimensional array of such super-regions. Each super-region includes a plurality of regions of programmable logic and a region of programmable memory. Each logic region includes a plurality of subregions of programmable logic. Each super-region has associated interconnection resources for allowing communication between the logic and memory regions of that super-region without the need to use, for such relatively local interconnections, the longer-length inter-super-region interconnection resources that are also provided on the device.
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