发明授权
US06879183B2 Programmable logic device architectures with super-regions having logic regions and a memory region
有权
具有逻辑区域和存储区域的超区域的可编程逻辑器件架构
- 专利标题: Programmable logic device architectures with super-regions having logic regions and a memory region
- 专利标题(中): 具有逻辑区域和存储区域的超区域的可编程逻辑器件架构
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申请号: US10260712申请日: 2002-09-27
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公开(公告)号: US06879183B2公开(公告)日: 2005-04-12
- 发明人: David E. Jefferson , Cameron McClintock , James Schleicher , Andy L. Lee , Manuel Mejia , Bruce B. Pedersen , Christopher F. Lane , Richard G. Cliff , Srinivas T. Reddy
- 申请人: David E. Jefferson , Cameron McClintock , James Schleicher , Andy L. Lee , Manuel Mejia , Bruce B. Pedersen , Christopher F. Lane , Richard G. Cliff , Srinivas T. Reddy
- 申请人地址: US CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: US CA San Jose
- 代理机构: Fish and Neave
- 代理商 Robert R. Jackson; Jeffrey C. Aldridge
- 主分类号: H01L21/82
- IPC分类号: H01L21/82 ; H03K19/173 ; H03K19/177
摘要:
A programmable logic device has a plurality of super-regions of programmable circuitry disposed on the device in a two-dimensional array of such super-regions. Each super-region includes a plurality of regions of programmable logic and a region of programmable memory. Each logic region includes a plurality of subregions of programmable logic. Each super-region has associated interconnection resources for allowing communication between the logic and memory regions of that super-region without the need to use, for such relatively local interconnections, the longer-length inter-super-region interconnection resources that are also provided on the device.
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