发明授权
- 专利标题: Nonvolatile memory and semiconductor device
- 专利标题(中): 非易失性存储器和半导体器件
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申请号: US10725535申请日: 2003-12-03
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公开(公告)号: US06885059B2公开(公告)日: 2005-04-26
- 发明人: Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
- 申请人: Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
- 申请人地址: JP Kanagawa-ken
- 专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人地址: JP Kanagawa-ken
- 代理机构: Nixon Peabody LLP
- 代理商 Jeffrey L. Costellia
- 优先权: JP2000-221436 20000721
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/77 ; H01L27/12 ; H01L29/786 ; H01L29/788
摘要:
A nonvolatile memory transistor with multi values being capable of suppressing a short channel effect is provided. In an active region of a memory transistor, stripe-shaped impurity regions (pinning regions) are formed in a channel length direction. The pinning regions suppress the spread of a depletion layer of a drain region, and a short channel effect caused by fine processing. Furthermore, in a memory transistor using pinning regions, by assigning one value or one bit of data to each channel forming region, the memory transistor is allowed to have multi values. More specifically, the present invention has a configuration in which a floating gate electrode is provided on each of a plurality of channel forming regions via a first gate insulating film, and an electric potential can be applied independently to a plurality of pinning regions.
公开/授权文献
- US20040108543A1 Nonvolatile memory and semiconductor device 公开/授权日:2004-06-10
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