发明授权
- 专利标题: Method for producing an electrical circuit
- 专利标题(中): 电路制造方法
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申请号: US10132939申请日: 2002-04-26
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公开(公告)号: US06900536B1公开(公告)日: 2005-05-31
- 发明人: Gary F. Derbenwick , Alan D. DeVilbiss
- 申请人: Gary F. Derbenwick , Alan D. DeVilbiss
- 申请人地址: US CO Colorado Springs
- 专利权人: Celis Semiconductor Corporation
- 当前专利权人: Celis Semiconductor Corporation
- 当前专利权人地址: US CO Colorado Springs
- 代理机构: Hanes & Schutz, P.C.
- 代理商 Mark G. Pannell
- 主分类号: G06K19/077
- IPC分类号: G06K19/077 ; H01L20060101 ; H01L21/44 ; H01L23/34 ; H01L23/498 ; H05K1/18 ; H05K5/00
摘要:
An electrical circuit is formed by forming and patterning a conductive layer on a substrate, forming and patterning a conductive layer on another substrate, depositing a dielectric layer on at least a portion of one of conductive layers, mounting an integrated circuit (IC) between the substrates, coupling the IC to the conductive layers, and affixing the substrates together with the conductive layers between the substrates. These are either separate substrates or a unitary substrate. The IC is mounted either to a substrate, a conductive layer, or a dielectric layer. The IC is coupled to the conductive layers either directly or through openings formed in the dielectric layer. An interior conductive layer may be used to couple the IC to the conductive layers.
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