发明授权
- 专利标题: Reduction of capacitive effects in a semiconductor memory device
- 专利标题(中): 降低半导体存储器件中的电容效应
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申请号: US10691707申请日: 2003-10-24
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公开(公告)号: US06917560B2公开(公告)日: 2005-07-12
- 发明人: Koji Nii
- 申请人: Koji Nii
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 代理机构: McDermott Will & Emery LLP
- 优先权: JP2003-125401 20030430
- 主分类号: G11C11/41
- IPC分类号: G11C11/41 ; G11C8/16 ; H01L21/8244 ; H01L27/108 ; H01L27/11 ; G11C8/00
摘要:
A semiconductor memory device having a multiport memory includes a plurality of memory cells MC arranged in columns and rows, a plurality of first word lines WLA0-WLAn connected to a first port 13a, and a plurality of second word lines WLB0-WLBn connected to a second port 13b. Each of a plurality of first word lines WLA0-WLAn and each of a plurality of second word lines WLB0-WLBn are arranged alternately in a planar layout. A semiconductor memory device is thus obtained that allows a coupling noise between interconnections to be reduced without an increase in memory cell area.
公开/授权文献
- US20040218455A1 Semiconductor memory device 公开/授权日:2004-11-04
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