- 专利标题： Methods of forming memory circuitry
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申请号： US10615287申请日： 2003-07-07
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公开(公告)号： US06921692B2公开(公告)日： 2005-07-26
- 发明人: Kunal R. Parekh , Byron N. Burgess
- 申请人： Kunal R. Parekh , Byron N. Burgess
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Wells St. John P.S.
- 主分类号： G11C11/00
- IPC分类号： G11C11/00 ; H01L21/60 ; H01L21/8234 ; H01L21/8242 ; H01L27/108
摘要：
The invention includes methods of forming memory circuitry. In one implementation, a semiconductor substrate includes a pair of word lines having a bit node received therebetween. A bit node contact opening is formed within insulative material over the bit node. Sacrificial plugging material is formed within the bit node contact opening between the pair of word lines. Sacrificial plugging material is removed from the bit node contact opening between the pair of word lines, and it is replaced with conductive material that is in electrical connection with the bit node. Thereafter, the conductive material is formed into a bit line.
公开/授权文献
- US20050009270A1 METHODS OF FORMING MEMORY CIRCUITRY 公开/授权日：2005-01-13
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