- 专利标题: Data retaining circuit
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申请号: US10282862申请日: 2002-10-28
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公开(公告)号: US06922094B2公开(公告)日: 2005-07-26
- 发明人: Yukio Arima , Takahiro Yamashita , Koichiro Ishibashi
- 申请人: Yukio Arima , Takahiro Yamashita , Koichiro Ishibashi
- 申请人地址: JP Yokohama
- 专利权人: Semiconductor Technology Academic Research Center
- 当前专利权人: Semiconductor Technology Academic Research Center
- 当前专利权人地址: JP Yokohama
- 代理机构: Christie, Parker and Hale, LLP
- 优先权: JP2002-076789 20020319
- 主分类号: G11C11/417
- IPC分类号: G11C11/417 ; H03K3/037 ; H03K3/356 ; H03K3/3565 ; H03K17/16 ; H03K19/003 ; H03K19/0175 ; H03K3/286
摘要:
A data retaining circuit has been disclosed in which, even if a soft error occurs, it is corrected and a normal value can be maintained, the configuration is simple, and high-speed operations are enabled. In this circuit, when a soft error occurs in the data to be put out, it is corrected by a pull-up path or a pull-down path, and when a soft error occurs in the data in the pull-up path or the pull-down path, the error data in the pull-up path or the pull-down path is prevented from affecting each other, as well as turning off the correcting function to prevent the influence on the data to be put out.
公开/授权文献
- US20030179031A1 Data retaining circuit 公开/授权日:2003-09-25
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