发明授权
US06928494B1 Method and apparatus for timing-dependant transfers using FIFOs
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使用FIFO进行定时相关传输的方法和装置
- 专利标题: Method and apparatus for timing-dependant transfers using FIFOs
- 专利标题(中): 使用FIFO进行定时相关传输的方法和装置
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申请号: US09538386申请日: 2000-03-29
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公开(公告)号: US06928494B1公开(公告)日: 2005-08-09
- 发明人: Andrew M. Volk , Michael W. Williams , David J. McDonnell
- 申请人: Andrew M. Volk , Michael W. Williams , David J. McDonnell
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理商 John F. Travis
- 主分类号: G11C7/10
- IPC分类号: G11C7/10 ; G06F3/00
摘要:
A method and apparatus for communicating commands and/or data between two different time domains. In one embodiment, multiple memory commands are placed into one or more FIFOs in a manner that specifies the delays that must take place between execution of the different commands. Along with the commands, delay information is placed into the FIFOs, specifying the number of clock cycles, or other form of time delay, that must elapse between execution of a command and execution of a subsequent command. This delay information is used to delay the execution of the subsequent command for the specified time period, while minimizing or eliminating any excess delays. Cue information can also be placed into the FIFOs with the commands to specify which commands must wait for other commands before beginning execution. The delay and cue information is determined and created in the time domain that initiates the transfers. The delays and cueing are executed in the other time domain. Although the different commands may be delivered through different FIFOs and can therefore have unpredictable arrival times with respect to each other, the delay and cueing information maintains the proper execution order and timing between the commands. Interactive control logic at the output of each FIFO uses the timing data to maintain execution in the proper order and with the proper inter-command delays.
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