A pixel clock generation apparatus includes a detector detecting a time interval between two horizontal synchronization signals. A comparing part compares the time interval detected by the detector and a target value, and outputs the difference. A phase shift data generation part stores one or more lookup tables each storing a pattern of phase shift data for controlling a phase shift amount of a pixel clock, and reads and outputs the phase shift data from the lookup table based on the difference that is output from the comparing part. A high frequency clock generation part generates a high frequency clock. A pixel clock generation part generates the pixel clock whose phase is controlled in accordance with the phase shift data based on the high frequency clock.