发明授权
US06939649B2 Fabrication method of semiconductor integrated circuit device and mask
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半导体集成电路器件和掩模的制造方法
- 专利标题: Fabrication method of semiconductor integrated circuit device and mask
- 专利标题(中): 半导体集成电路器件和掩模的制造方法
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申请号: US10259397申请日: 2002-09-30
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公开(公告)号: US06939649B2公开(公告)日: 2005-09-06
- 发明人: Shoji Hotta , Norio Hasegawa , Toshihiko Tanaka
- 申请人: Shoji Hotta , Norio Hasegawa , Toshihiko Tanaka
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 代理机构: Antonelli, Terry, Stout & Kraus, LLP
- 优先权: JP2001-314812 20011012
- 主分类号: G03F1/29
- IPC分类号: G03F1/29 ; G03F1/54 ; G03F1/68 ; G03F7/20 ; H01L21/027 ; G03F9/00 ; G03C5/00
摘要:
A method of fabrication of a semiconductor integrated circuit device uses a mark having, on a first main surface of a mask substrate, a first light transmitting region, a second light transmitting region disposed at the periphery of the first light transmitting region and permitting inversion of the phase of light transmitted through the second light transmitting region relative to light transmitted through the first light transmitting region, and a light shielding region disposed at the periphery of the second light transmitting region. The second light transmitting region is formed from a first film deposited over the first main surface of the mask substrate, said light shielding region is formed by a second film deposited over the first main surface of the mask substrate via said first film, and at least one of said first film and second is formed from a resist film.
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