发明授权
US06943106B1 Methods of fabricating interconnects for semiconductor components including plating solder-wetting material and solder filling
有权
制造用于半导体部件的互连的方法，包括电镀焊料润湿材料和焊料填充
- 专利标题： Methods of fabricating interconnects for semiconductor components including plating solder-wetting material and solder filling
- 专利标题（中）： 制造用于半导体部件的互连的方法，包括电镀焊料润湿材料和焊料填充
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申请号： US10784074申请日： 2004-02-20
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公开(公告)号： US06943106B1公开(公告)日： 2005-09-13
- 发明人: Kyle K. Kirby , Shuang Meng , Garo J. Derderian
- 申请人： Kyle K. Kirby , Shuang Meng , Garo J. Derderian
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Wells St. John P.S.
- 主分类号： H01L21/768
- IPC分类号： H01L21/768 ; H01L23/48 ; H01L21/4763 ; H01L21/44
摘要：
In one aspect, the invention encompasses a method of fabricating an interconnect for a semiconductor component. A semiconductor substrate is provided, and an opening is formed which extends entirely through the substrate. A first material is deposited along sidewalls of the opening at a temperature of less than or equal to about 200° C. The deposition can comprise one or both of atomic layer deposition and chemical vapor deposition, and the first material can comprise a metal nitride. A solder-wetting material is formed over a surface of the first material. The solder-wetting material can comprise, for example, nickel. Subsequently, solder is provided within the opening and over the solder-wetting material.
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