Invention Grant
US06944065B2 Method, apparatus, and system to enhance negative voltage switching
有权
方法，装置和系统来增强负电压切换
- Patent Title: Method, apparatus, and system to enhance negative voltage switching
- Patent Title (中): 方法，装置和系统来增强负电压切换
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Application No.: US10877634Application Date: 2004-06-25
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Publication No.: US06944065B2Publication Date: 2005-09-13
- Inventor: Kerry D. Tedrow , Rajesh Sundaram
- Applicant: Kerry D. Tedrow , Rajesh Sundaram
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Ami Patel Shah
- Main IPC: G11C16/08
- IPC: G11C16/08 ; G11C16/12 ; G11C16/16 ; G11C16/30 ; G11C7/00
Abstract:
The present invention is in the field of flash memory. More particularly, embodiments of the present invention may provide a negative voltage for erasing when coupled to a memory cell to be erased and provide voltages to read or program when not coupled to a memory cell that is selected to be erased. Embodiments may also provide a high magnitude negative voltage to erase; a low impedance, low voltage current to read or program; and burn little to no current when not coupled to a memory cell that is selected to be erased.
Public/Granted literature
- US20040228192A1 Method, apparatus, and system to enhance negative voltage switching Public/Granted day:2004-11-18
Information query
