Invention Grant
- Patent Title: Transistor structure and method of fabrication
- Patent Title (中): 晶体管结构及其制造方法
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Application No.: US09895697Application Date: 2001-06-29
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Publication No.: US06952040B2Publication Date: 2005-10-04
- Inventor: Robert S. Chau , Jack Kavalieros , Anand Murthy , Brian Roberds , Brian S. Doyle
- Applicant: Robert S. Chau , Jack Kavalieros , Anand Murthy , Brian Roberds , Brian S. Doyle
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/336 ; H01L29/49 ; H01L29/76 ; H01L29/786 ; H01L29/94 ; H01L31/062 ; H01L31/113

Abstract:
A novel transistor structure and its method of fabrication. According to the present invention, the transistor includes an intrinsic silicon body having a first surface. A gate dielectric is formed on the first surface of the intrinsic silicon body. A gate electrode is formed on the gate dielectric wherein the gate electrode comprises a mid-gap work function film on the gate dielectric. A pair of source/drain regions are formed on opposite sides of the intrinsic silicon body.
Public/Granted literature
- US20030001219A1 Novel transistor structure and method of fabrication Public/Granted day:2003-01-02
Information query
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