Invention Grant
- Patent Title: High-efficiency error detection and/or correction code
- Patent Title (中): 高效率错误检测和/或校正码
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Application No.: US09960835Application Date: 2001-09-21
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Publication No.: US06961891B2Publication Date: 2005-11-01
- Inventor: Laurent Murillo
- Applicant: Laurent Murillo
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics S.A.
- Current Assignee: STMicroelectronics S.A.
- Current Assignee Address: FR Montrouge
- Agency: Seed IP Law Group PLLC
- Agent Lisa K. Jorgenson; Robert Iannucci
- Priority: FR0012225 20000926
- Main IPC: H03M13/13
- IPC: H03M13/13 ; H03M13/15 ; H03M13/19 ; H03M13/29

Abstract:
A method for determining r error detection bits of a word of m bits to be coded, including the step of calculating the product of a vector with m components representative of said word of m bits to be coded and of a parity check matrix. The parity check matrix includes a pattern matrix that may be repeated in said parity check matrix, and said pattern being chosen so that a sum modulo 2 of any two columns of said sub-matrix does not give as a result another column of said sub-matrix. Another method determines a syndrome using r error detection bits determined by the above method.
Public/Granted literature
- US20020059552A1 High-efficiency error detection and/or correction code Public/Granted day:2002-05-16
Information query
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