发明授权
US06967892B2 Non-volatile semiconductor memory device and memory system using the same
失效
非易失性半导体存储器件和使用其的存储器系统
- 专利标题: Non-volatile semiconductor memory device and memory system using the same
- 专利标题(中): 非易失性半导体存储器件和使用其的存储器系统
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申请号: US10804094申请日: 2004-03-19
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公开(公告)号: US06967892B2公开(公告)日: 2005-11-22
- 发明人: Tomoharu Tanaka , Masaki Momodomi , Hideo Kato , Hiroto Nakai , Yoshiyuki Tanaka , Riichiro Shirota , Seiichi Aritome , Yasuo Itoh , Yoshihisa Iwata , Hiroshi Nakamura , Hideko Odaira , Yutaka Okamoto , Masamichi Asano , Kaoru Tokushige
- 申请人: Tomoharu Tanaka , Masaki Momodomi , Hideo Kato , Hiroto Nakai , Yoshiyuki Tanaka , Riichiro Shirota , Seiichi Aritome , Yasuo Itoh , Yoshihisa Iwata , Hiroshi Nakamura , Hideko Odaira , Yutaka Okamoto , Masamichi Asano , Kaoru Tokushige
- 申请人地址: JP Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Kawasaki
- 代理机构: Foley & Lardner LLP
- 优先权: JP3-354871 19911219; JP3-343200 19911225; JP4-086082 19920310; JP4-077946 19920331; JP4-105831 19920331; JP4-175693 19920702
- 主分类号: G06F11/10
- IPC分类号: G06F11/10 ; G11C16/10 ; G11C16/12 ; G11C16/34 ; G11C29/00 ; G11C29/34 ; G11C29/52 ; G11C16/04
摘要:
The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite oepration, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.
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