发明授权
- 专利标题: Method of forming an element of a microelectronic circuit
- 专利标题(中): 形成微电子电路元件的方法
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申请号: US10387623申请日: 2003-03-12
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公开(公告)号: US06972228B2公开(公告)日: 2005-12-06
- 发明人: Brian S. Doyle , Anand S. Murthy , Robert S. Chau
- 申请人: Brian S. Doyle , Anand S. Murthy , Robert S. Chau
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: H01L21/20
- IPC分类号: H01L21/20 ; H01L29/12 ; H01S5/34 ; H01L21/8242
摘要:
A method is described for forming an element of a microelectronic circuit. A sacrificial layer is formed on an upper surface of a support layer. The sacrificial layer is extremely thin and uniform. A height-defining layer is then formed on the sacrificial layer, whereafter the sacrificial layer is etched away so that a well-defined gap is left between an upper surface of the support layer and a lower surface of the height-defining layer. A monocrystalline semiconductor material is then selectively grown from a nucleation silicon site through the gap. The monocrystalline semiconductor material forms a monocrystalline layer having a thickness corresponding to the thickness of the original sacrificial layer.
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