- 专利标题: Method for forming shallow trench in semiconductor device
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申请号: US10751503申请日: 2004-01-06
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公开(公告)号: US06974741B2公开(公告)日: 2005-12-13
- 发明人: Hsiu-Chun Lee , Tse-Yao Huang , Yi-Nan Chen
- 申请人: Hsiu-Chun Lee , Tse-Yao Huang , Yi-Nan Chen
- 申请人地址: TW Taoyuan
- 专利权人: NANYA Technology Corporatiion
- 当前专利权人: NANYA Technology Corporatiion
- 当前专利权人地址: TW Taoyuan
- 代理机构: Bacon & Thomas, PLLC
- 主分类号: H01L21/308
- IPC分类号: H01L21/308 ; H01L21/762 ; H01L21/8238
摘要:
Disclosed is a method for forming a shallow trench. The method of the present invention comprises steps of providing a substrate; forming a plurality of operation layers on the substrate; forming photoresist on the uppermost one of the operation layers to define a position to be etched; etching a portion of the operation layers at said position to form an opening; forming a spacing layer on the sidewall of the opening; and etching a portion of the substrate corresponding to the opening to form a shallow trench. By the etching method of the present invention, a striation phenomenon caused by the common mask etch is avoided.
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