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US06979904B2 Integrated circuit package having reduced interconnects 失效
集成电路封装具有减少的互连

Integrated circuit package having reduced interconnects
摘要:
A technique for making an integrated circuit package. Specifically, a stacked memory device is provided with minimal interconnects. Memory die are stacked on top of each other and electrically coupled to a substrate. Thru vias are provided in the substrate and/or memory die to facilitate the electrical connects without necessitating a complex interconnect technology between each of the interfaces. Wire bonds are used to complete the circuit package.
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