发明授权
- 专利标题: Method of manufacturing semiconductor device
- 专利标题(中): 制造半导体器件的方法
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申请号: US10243742申请日: 2002-09-16
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公开(公告)号: US07015107B2公开(公告)日: 2006-03-21
- 发明人: Kohei Sugihara , Hirokazu Sayama
- 申请人: Kohei Sugihara , Hirokazu Sayama
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 代理机构: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
- 优先权: JP2002-058852 20020305
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
When a dummy sidewall and source and drain regions are once formed and then the dummy sidewall is removed to extend the source and drain regions, the removal of the dummy sidewall is performed after formation of a protective oxide film on a gate electrode and on the major surfaces of the source and drain regions. This efficiently prevents conventional surface roughness of the upper surface of the gate electrode and the impurity region due to the removal of the dummy sidewall.
公开/授权文献
- US06780723B2 Method of manufacturing semiconductor device 公开/授权日:2004-08-24
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