- 专利标题： Active block write-back from SRAM cache to DRAM
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申请号： US10086174申请日： 2002-02-28
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公开(公告)号： US07027064B2公开(公告)日： 2006-04-11
- 发明人: Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
- 申请人： Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
- 申请人地址： US CA Santa Clara
- 专利权人： Sun Microsystems, Inc.
- 当前专利权人： Sun Microsystems, Inc.
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Meyertons Hood Kivlin Kowert & Goetzel, P.C.
- 代理商 Jeffrey C. Hood
- 主分类号： G09G5/36
- IPC分类号： G09G5/36 ; G06F13/00 ; G06F12/00
摘要：
An external cache management unit for use with 3D-RAM and suitable for use in a computer graphics system is described. The unit maintains and tracks the status of level one cache memory in the 3D-RAM. The unit identifies dirty blocks of cache memory and prioritizes block cleansing based on a least used algorithm. Periodic block cleansing during empty memory cycles is provided for, and may also be prompted on demand.
公开/授权文献
- US20030160796A1 Active block write-back from SRAM cache to DRAM 公开/授权日：2003-08-28
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