发明授权
- 专利标题: Fabrication method of semiconductor wafer
- 专利标题(中): 半导体晶圆的制造方法
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申请号: US10792884申请日: 2004-03-05
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公开(公告)号: US07029977B2公开(公告)日: 2006-04-18
- 发明人: Daisuke Kishimoto , Susumu Iwamoto , Katsunori Ueno , Ryohsuke Shimizu , Satoshi Oka
- 申请人: Daisuke Kishimoto , Susumu Iwamoto , Katsunori Ueno , Ryohsuke Shimizu , Satoshi Oka
- 申请人地址: JP Tokyo JP Tokyo
- 专利权人: Fuji Electric Holdings Co., Ltd.,Shin-Etsu Handotai Co., Ltd.
- 当前专利权人: Fuji Electric Holdings Co., Ltd.,Shin-Etsu Handotai Co., Ltd.
- 当前专利权人地址: JP Tokyo JP Tokyo
- 代理机构: Venable LLP
- 代理商 Michael A. Sartori; Thomas C. Schoeffler
- 优先权: JP2003-062103 20030307
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/4763
摘要:
A fabrication method of a semiconductor wafer can fill trenches formed in a semiconductor substrate with an epitaxial film with high crystal quality without leaving cavities in the trenches. The trenches are formed in the first conductivity type semiconductor substrate. Planes exposed inside the trenches are made clean surfaces by placing the substrate in a gas furnace, followed by supplying the furnace with an etching gas and carrier gas, and by performing etching on the exposed planes inside the trenches by a thickness from about a few nanometers to one micrometer. The trenches have a geometry opening upward through the etching. Following the etching, a second conductivity type semiconductor is epitaxially grown in the trenches by supplying the furnace with a growth gas, etching gas, doping gas and carrier gas, thereby filling the trenches. Instead of making the trenches slightly-opened upward, their sidewalls may be made planes enabling facet formation.
公开/授权文献
- US20040185665A1 Fabrication method of semiconductor wafer 公开/授权日:2004-09-23
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