发明授权
US07030676B2 Timing circuit for separate positive and negative edge placement in a switching DC-DC converter
失效
用于在开关DC-DC转换器中单独的正和负边缘放置的定时电路
- 专利标题: Timing circuit for separate positive and negative edge placement in a switching DC-DC converter
- 专利标题(中): 用于在开关DC-DC转换器中单独的正和负边缘放置的定时电路
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申请号: US10748298申请日: 2003-12-31
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公开(公告)号: US07030676B2公开(公告)日: 2006-04-18
- 发明人: Peter Hazucha , Gerhard Schrom , Tanay Karnik , Vivek De
- 申请人: Peter Hazucha , Gerhard Schrom , Tanay Karnik , Vivek De
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Fleshner & Kim LLP
- 主分类号: H03H11/26
- IPC分类号: H03H11/26
摘要:
A timing circuit independently controls placement of the positive and negative edges of a periodic signal. This signal may then be used to control a wide variety of integrated circuit applications. The timing circuit includes separate programmable delay lines and a signal processor. Each delay line delays an input clock signal by a different increment of time. The signal processor then generates a timing signal from the clock signal, where the timing signal has a first edge controlled by the first delayed clock signal and a second edge controlled by the second delayed clock signal. The edges may be controlled so that the timing signal assumes different logical values for different amounts of time, thereby customizing the signal to any application. An example of one application includes using the timing signal control switching in a DC-DC converter.
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