发明授权
US07035141B1 Diode array architecture for addressing nanoscale resistive memory arrays
有权
用于寻址纳米尺度电阻式存储器阵列的二极管阵列架构
- 专利标题: Diode array architecture for addressing nanoscale resistive memory arrays
- 专利标题(中): 用于寻址纳米尺度电阻式存储器阵列的二极管阵列架构
-
申请号: US10990706申请日: 2004-11-17
-
公开(公告)号: US07035141B1公开(公告)日: 2006-04-25
- 发明人: Nicholas H. Tripsas , Colin S. Bill , Michael A. VanBuskirk , Matthew Buynoski , Tzu-Ning Fang , Wei Daisy Cai , Suzette Pangrle , Steven Avanzino
- 申请人: Nicholas H. Tripsas , Colin S. Bill , Michael A. VanBuskirk , Matthew Buynoski , Tzu-Ning Fang , Wei Daisy Cai , Suzette Pangrle , Steven Avanzino
- 专利权人: Spansion LLC
- 当前专利权人: Spansion LLC
- 主分类号: G11C11/36
- IPC分类号: G11C11/36 ; G11C27/00
摘要:
The present memory structure includes thereof a first conductor, a second conductor, a resistive memory cell connected to the second conductor, a first diode connected to the resistive memory cell and the first conductor, and oriented in the forward direction from the resistive memory cell to the first conductor, and a second diode connected to the resistive memory cell and the first conductor, in parallel with the first diode, and oriented in the reverse direction from the resistive memory cell to the first conductor. The first and second diodes have different threshold voltages.