Invention Grant
- Patent Title: Single polysilicon process for DRAM
- Patent Title (中): DRAM的单晶过程
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Application No.: US10323981Application Date: 2002-12-19
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Publication No.: US07037776B2Publication Date: 2006-05-02
- Inventor: Jenn-Ming Huang , Chen-Yong Lin
- Applicant: Jenn-Ming Huang , Chen-Yong Lin
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Thomas, Kayden, Horstemeyer & Risley
- Main IPC: H01L21/8242
- IPC: H01L21/8242

Abstract:
A method of fabricating a DRAM cell, comprising the following steps. A substrate is provided. An isolation structure is formed within the substrate. The substrate is patterned to form nodes adjacent the isolation structure. Doped regions are formed with the substrate adjacent the nodes. A gate dielectric layer is formed over the patterned substrate, lining the nodes. A conductive layer is formed over the gate dielectric layer, filling the nodes. The conductive layer is patterned to form: a top electrode capacitor within the nodes; and respective word lines over the substrate adjacent the top electrode capacitor; each word line having exposed side walls. Source/drain regions are formed adjacent the word lines.
Public/Granted literature
- US20040121533A1 Single polysilicon process for dram Public/Granted day:2004-06-24
Information query
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