Invention Grant
- Patent Title: Interconnect structure and method for fabricating the same
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Application No.: US10908824Application Date: 2005-05-27
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Publication No.: US07067418B2Publication Date: 2006-06-27
- Inventor: Tse-Yao Huang , Yi-Nan Chen , Chih-Ching Lin
- Applicant: Tse-Yao Huang , Yi-Nan Chen , Chih-Ching Lin
- Applicant Address: TW Taoyuan
- Assignee: Nanya Technology Corporation
- Current Assignee: Nanya Technology Corporation
- Current Assignee Address: TW Taoyuan
- Agency: Jianq Chyun IP Office
- Priority: TW92123869A 20030829
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
A method for fabricating interconnects is provided. The method comprises forming a conducting line on a first dielectric layer; forming a first liner layer on the surfaces of the first dielectric layer and the conducting line; forming a second liner layer on the first liner layer; forming a second dielectric layer on the second liner layer, wherein the etching selectivity rate of the second dielectric layer is higher than the etching selectivity rate of the second liner; and patterning the second dielectric layer to form a contact window opening through the second liner layer and the first liner layer to expose the surface of the conducting line. Because the second dielectric layer having an etching rate higher than the etching rate of the second liner layer, the second liner layer can be used as an etch stop layer while patterning the second dielectric layer.
Public/Granted literature
- US20050202671A1 INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THE SAME Public/Granted day:2005-09-15
Information query
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