Invention Grant
US07074662B2 Methods for fabricating fin field effect transistors using a protective layer to reduce etching damage
失效
使用保护层制造鳍状场效应晶体管以减少蚀刻损伤的方法
- Patent Title: Methods for fabricating fin field effect transistors using a protective layer to reduce etching damage
- Patent Title (中): 使用保护层制造鳍状场效应晶体管以减少蚀刻损伤的方法
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Application No.: US10869764Application Date: 2004-06-16
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Publication No.: US07074662B2Publication Date: 2006-07-11
- Inventor: Deok-Hyung Lee , Si-Young Choi , Byeong-Chan Lee , Yong-Hoon Son , In-Soo Jung
- Applicant: Deok-Hyung Lee , Si-Young Choi , Byeong-Chan Lee , Yong-Hoon Son , In-Soo Jung
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, PA
- Priority: KR10-2003-0051028 20030724
- Main IPC: H01L21/8238
- IPC: H01L21/8238
Abstract:
A method of forming a fin field effect transistor on a semiconductor substrate includes forming a vertical fin protruding from the substrate. A buffer oxide liner is formed on a top surface and on sidewalls of the fin. A trench is then formed on the substrate, where at least a portion of the fin protrudes from a bottom surface of the trench. The trench may be formed by forming a dummy gate on at least a portion of the fin, forming an insulation layer on the fin surrounding the dummy gate, and then removing the dummy gate to expose the at least a portion of the fin, such that the trench is surrounded by the insulation layer. The buffer oxide liner is then removed from the protruding portion of the fin, and a gate is formed in the trench on the protruding portion of the fin.
Public/Granted literature
- US20050019993A1 Methods for fabricating fin field effect transistors using a protective layer to reduce etching damage Public/Granted day:2005-01-27
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