发明授权
- 专利标题: Method of manufacturing semiconductor device having conductive thin films
- 专利标题(中): 制造具有导电薄膜的半导体器件的方法
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申请号: US10265105申请日: 2002-10-07
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公开(公告)号: US07091520B2公开(公告)日: 2006-08-15
- 发明人: Takashi Nakajima , Hideo Miura , Hiroyuki Ohta , Noriaki Okamoto
- 申请人: Takashi Nakajima , Hideo Miura , Hiroyuki Ohta , Noriaki Okamoto
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 代理机构: Antonelli, Terry, Stout and Kraus, LLP.
- 优先权: JP04-358065 19921225
- 主分类号: H01L29/10
- IPC分类号: H01L29/10
摘要:
In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material. In this case, depositing of the amorphous layers is carried out dividedly by a plurality of times so that the thickness of an amorphous layer to be deposited at one time is not larger than a thickness to be prescribed by a critical stress value determined according to a fail event, the amorphous material is crystallized after each process of depositing each amorphous layer has been finished, and the process of depositing amorphous layers and the process of crystallizing the amorphous material are repeated, whereby a laminated structure of the polycrystalline layer 6 having a necessary film thickness is obtained. With the above-described arrangement, it is possible to prevent a deterioration of electric characteristics of a semiconductor device and an occurrence of a defect, such as a peeling off between layers, cracks in a layer, etc., and it is possible to obtain a polycrystalline layer of small grain size in a desired film thickness by a lamination of polycrystalline materials.
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