- 专利标题： Method and apparatus for next-line prefetching from a predicted memory address
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申请号： US10163977申请日： 2002-06-05
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公开(公告)号： US07093077B2公开(公告)日： 2006-08-15
- 发明人: Robert N. Cooksey , Stephan J. Jourdan
- 申请人： Robert N. Cooksey , Stephan J. Jourdan
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理商 Kerry D. Tweet
- 主分类号： G06F12/00
- IPC分类号： G06F12/00
摘要：
A method and apparatus for issuing one or more next-line prefetch requests from a predicted memory address. The first issued next-line prefetch request corresponds to a cache line having a memory address contiguous with the predicted memory address. Any subsequent next-line prefetch request corresponds to a cache line having a memory address contiguous with a memory address associated with a preceding next-line prefetch request.
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