发明授权
US07096413B2 Decomposer for parallel turbo decoding, process and integrated circuit
有权
并行turbo解码,处理和集成电路的分解器
- 专利标题: Decomposer for parallel turbo decoding, process and integrated circuit
- 专利标题(中): 并行turbo解码,处理和集成电路的分解器
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申请号: US10299270申请日: 2002-11-19
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公开(公告)号: US07096413B2公开(公告)日: 2006-08-22
- 发明人: Alexander E. Andreev , Ranko Scepanovic , Vojislav Vukovic
- 申请人: Alexander E. Andreev , Ranko Scepanovic , Vojislav Vukovic
- 申请人地址: US CA Milpitas
- 专利权人: LSI Logic Corporation
- 当前专利权人: LSI Logic Corporation
- 当前专利权人地址: US CA Milpitas
- 代理机构: Westman, Champlin & Kelly
- 主分类号: H03M13/03
- IPC分类号: H03M13/03 ; G06F11/00
摘要:
A decoder for access data stored in n memories comprises a function matrix containing addresses of the memory locations at unique coordinates. A decomposer sorts addresses from coordinate locations of first and second m×n matrices, such that each row contains no more than one address from the same memory. Positional apparatus stores entries in third and fourth m×n matrices identifying coordinates of addresses in the function matrix such that each entry in the third matrix is at coordinates that matches corresponding coordinates in the first matrix, and each entry in the fourth matrix is at coordinates that matches corresponding coordinates in the second matrix. The decoder is responsive to entries in the matrices for accessing data in parallel from the memories.
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