Invention Grant
- Patent Title: Gate with dual gate dielectric layer and method of fabricating the same
- Patent Title (中): 具有双栅介质层的栅极及其制造方法
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Application No.: US10884769Application Date: 2004-07-02
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Publication No.: US07115477B2Publication Date: 2006-10-03
- Inventor: Chung-Lin Huang , Ying-Cheng Chuang
- Applicant: Chung-Lin Huang , Ying-Cheng Chuang
- Applicant Address: TW Taoyuan
- Assignee: Nanya Technology Corporation
- Current Assignee: Nanya Technology Corporation
- Current Assignee Address: TW Taoyuan
- Agency: Quintero Law Office
- Priority: TW91121992A 20020925
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A gate with dual gate dielectric layer and fabrication method thereof. A semiconductor substrate is provided, on which a dielectric layer and a patterned hard mask layer with an opening are sequentially formed. A spacer is formed on a sidewall of the opening. The semiconductor substrate is ion implanted, the spacer and the exposed dielectric layer are removed, and a gate oxide layer is formed on the bottom of the opening.
Public/Granted literature
- US20040241937A1 Gate with dual gate dielectric layer and method of fabricating the same Public/Granted day:2004-12-02
Information query
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