发明授权
US07122431B2 Methods of fabrication metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions
有权
制造具有低于源极和漏极区域的缓冲区的金属氧化物半导体(MOS)晶体管的方法
- 专利标题: Methods of fabrication metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions
- 专利标题(中): 制造具有低于源极和漏极区域的缓冲区的金属氧化物半导体(MOS)晶体管的方法
-
申请号: US10754676申请日: 2004-01-09
-
公开(公告)号: US07122431B2公开(公告)日: 2006-10-17
- 发明人: Sung-Min Kim , Dong-Gun Park , Sung-Young Lee , Hye-Jin Cho , Eun-Jung Yun , Shin-Ae Lee , Chang-Woo Oh , Jeong-Dong Choe
- 申请人: Sung-Min Kim , Dong-Gun Park , Sung-Young Lee , Hye-Jin Cho , Eun-Jung Yun , Shin-Ae Lee , Chang-Woo Oh , Jeong-Dong Choe
- 申请人地址: KR
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR
- 代理机构: Myers Bigel Sibley & Sajovec
- 优先权: KR10-2003-0002995 20030116; KR10-2003-0079861 20031112
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/3205 ; H01L21/00 ; H01L21/20 ; H01L21/425
摘要:
Methods of forming a unit cell of a metal oxide semiconductor (MOS) transistor are provided. An integrated circuit substrate is formed. A MOS transistor is formed on the integrated circuit substrate. The MOS transistor has a source region, a drain region and a gate. The gate is between the source region and the drain region. The first and second spaced apart buffer regions are formed beneath the source region and the drain region and between respective ones of the source region and integrated circuit substrate and the drain region and the integrated circuit substrate.
公开/授权文献
信息查询
IPC分类: