发明授权
- 专利标题: Method of forming solder bump with reduced surface defects
- 专利标题(中): 形成具有减少的表面缺陷的焊料凸块的方法
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申请号: US10922172申请日: 2004-08-20
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公开(公告)号: US07132358B2公开(公告)日: 2006-11-07
- 发明人: Se-Young Jeong , Jin-Hak Choi , Nam-Seog Kim , Kang-Wook Lee
- 申请人: Se-Young Jeong , Jin-Hak Choi , Nam-Seog Kim , Kang-Wook Lee
- 申请人地址: KR Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Gyeonggi-do
- 代理机构: Harness, Dickey & Pierce, P.L.C.
- 优先权: KR10-2003-0058003 20030821
- 主分类号: H01L21/44
- IPC分类号: H01L21/44
摘要:
A method of forming a solder bump may involve forming a first photoresist pattern on a wafer having a pad. The first photoresist pattern may have an opening that exposes a portion of the pad. A first under bump metallurgy (UBM) layer may be formed on the pad, and a second UBM layer may be formed on the first photoresist pattern. A second photoresist pattern may be formed that exposes the first UBM layer and covers the second UBM layer. A solder bump may be formed in the opening. The second photoresist pattern and the first photoresist pattern may be removed using a stripper, thereby removing the second UBM layer by a lift-off method.
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