发明授权
- 专利标题: Method and device for generating clock signal
- 专利标题(中): 用于产生时钟信号的方法和装置
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申请号: US11044736申请日: 2005-01-27
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公开(公告)号: US07141961B2公开(公告)日: 2006-11-28
- 发明人: Hideki Hirayama , Tomofumi Watanabe , Masashi Kiyose
- 申请人: Hideki Hirayama , Tomofumi Watanabe , Masashi Kiyose
- 申请人地址: JP Osaka
- 专利权人: Sanyo Electric Co., Ltd.
- 当前专利权人: Sanyo Electric Co., Ltd.
- 当前专利权人地址: JP Osaka
- 代理机构: Fish & Richardson P.C.
- 优先权: JP2004-022818 20040130
- 主分类号: G01R19/00
- IPC分类号: G01R19/00
摘要:
A method and device for generating a clock signal accurately synchronized with a wobble signal including jitter even if there are manufacturing differences between voltage controlled oscillators. The clock signal generation device includes a voltage controlled oscillator for generating a clock signal corresponding to each of a plurality of oscillation characteristics. The clock signal generation device applies a test voltage to a voltage controlled oscillator with a voltage control device and sequentially identifies a plurality of oscillation characteristics set for the voltage controlled oscillator. The clock signal generation device selects one of the identified oscillation characteristics that has a frequency range with a generally middle part in which the frequency of a wobble signal is located and has a smaller gain.
公开/授权文献
- US20050168253A1 Method and device for generating clock signal 公开/授权日:2005-08-04
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