Invention Grant
US07145408B2 Resonant clock distribution for very large scale integrated circuits 有权
大规模集成电路的谐振时钟分配

Resonant clock distribution for very large scale integrated circuits
Abstract:
A circuit for distributing a clock signal in an integrated circuit includes a capacitive clock distribution circuit. At least one additional inductor is formed in a metal layer of the integrated circuit and is coupled to the clock distribution circuit. The inductor, which may distributed throughout the integrated circuit, has an inductance value selected to resonate with impedance of the capacitive clock distribution circuit. By operating the clock distribution circuit at resonance, power dissipation is reduced while skew and jitter performance can be improved.
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