- 专利标题： Interconnection structure of semiconductor device
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申请号： US10725384申请日： 2003-12-03
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公开(公告)号： US07154184B2公开(公告)日： 2006-12-26
- 发明人: Koyu Asai , Hiroshi Tobimatsu , Hiroyuki Kawata , Mahito Sawada
- 申请人： Koyu Asai , Hiroshi Tobimatsu , Hiroyuki Kawata , Mahito Sawada
- 申请人地址： JP Tokyo
- 专利权人： Renesas Technology Corp.
- 当前专利权人： Renesas Technology Corp.
- 当前专利权人地址： JP Tokyo
- 代理机构： McDermott Will & Emery LLP
- 优先权： JP2003-165013 20030610
- 主分类号： H01L23/48
- IPC分类号： H01L23/48
摘要：
An interconnection is provided with a dummy interconnection connected to an interconnection body, and the dummy interconnection is provided with a stress concentration portion in which tensile stress higher than that of the interconnection body is generated. In proximity to the stress concentration portion, an insulating film formed by high-density plasma CVD is provided, and the tensile stress is generated in the stress concentration portion by the insulating film. With this structure, the occurrence of a void can be prevented at any position in the interconnection body.
公开/授权文献
- US20040251555A1 Interconnection structure of semiconductor device 公开/授权日：2004-12-16