Structure and method for integrating MIM capacitor in BEOL wiring levels

Invention Grant

US07160772B2 Structure and method for integrating MIM capacitor in BEOL wiring levels 失效

Title translation: 将MIM电容器集成在BEOL布线层中的结构和方法

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Patent Title: Structure and method for integrating MIM capacitor in BEOL wiring levels
Patent Title (中): 将MIM电容器集成在BEOL布线层中的结构和方法
Application No.: US10906521

Application Date: 2005-02-23
Publication No.: US07160772B2

Publication Date: 2007-01-09
Inventor: Douglas D. Coolbaugh , Vidhya Ramachandran
Applicant: Douglas D. Coolbaugh , Vidhya Ramachandran
Applicant Address: US NY Armonk
Assignee: International Business Machines Corporation
Current Assignee: International Business Machines Corporation
Current Assignee Address: US NY Armonk
Agency: Cantor Colburn LLP
Main IPC: H01L21/8242
IPC: H01L21/8242

Structure and method for integrating MIM capacitor in BEOL wiring levels

Abstract:

A method for integrating a metal-insulator-metal (MIM) capacitor in back end of line (BEOL) wiring levels of a semiconductor device includes forming an isolating layer over a lower wiring level, forming a bottom electrode of the capacitor on the isolating layer, and forming an interlevel dielectric material on the isolating layer and the bottom electrode. A capacitor dielectric is formed on the bottom electrode and a top electrode of the capacitor is formed on the capacitor dielectric, wherein the top electrode is formed concurrently with an upper wiring level, the upper level being the next successive wiring level with respect to the lower wiring level.

Abstract(Chinese):

在半导体器件的后端（BEOL）布线层中集成金属 - 绝缘体 - 金属（MIM）电容器的方法包括在下布线层上形成隔离层，在隔离层上形成电容器的底电极并且在隔离层和底部电极上形成层间电介质材料。在底部电极上形成电容器电介质，并且在电容器电介质上形成电容器的顶部电极，其中顶部电极与上部布线电平同时形成，上部电平是相对于下部电极的下一个连续布线电平接线等级。

Public/Granted literature

US20060189069A1 STRUCTURE AND METHOD FOR INTEGRATING MIM CAPACITOR IN BEOL WIRING LEVELS Public/Granted day:2006-08-24

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8239	........存储器结构
H01L21/8242	.........动态随机存取存储结构（DRAM）