Invention Grant
- Patent Title: Methods for forming fine pattern of semiconductor device
- Patent Title (中): 用于形成半导体器件精细图案的方法
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Application No.: US10462448Application Date: 2003-06-16
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Publication No.: US07172974B2Publication Date: 2007-02-06
- Inventor: Sang-jun Choi , Young-mi Lee , Woo-sung Han
- Applicant: Sang-jun Choi , Young-mi Lee , Woo-sung Han
- Applicant Address: KR Suwon-Si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-Si
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2002-0065681 20021026
- Main IPC: H01L21/302
- IPC: H01L21/302

Abstract:
Provided is a method for forming a fine pattern of a semiconductor device by controlling the amount of flow of a resist pattern, including forming a resist pattern having a predetermined pattern distance on a material layer to be etched, forming a flow control barrier layer on the resist pattern to control the amount of flow during a subsequent resist flow process and to make the profile of the flowed pattern be vertical, optionally forming the flow control barrier layer by coating a material including a water-soluble high-molecular material and a crosslinking agent on the resist pattern, mixing and baking the coated material layer, and processing the resultant structure using deionized water, carrying out the flow resist process to form a hyperfine pattern and etching the lower material layer, and thereby forming fine patterns having the shape of contact holes or lines and spaces to have a critical dimension of about 100 nm or less, even with use of a KrF resist.
Public/Granted literature
- US20040082170A1 Method for forming fine pattern of semiconductor device Public/Granted day:2004-04-29
Information query
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