Invention Grant
US07176537B2 High performance CMOS with metal-gate and Schottky source/drain 有权
具有金属栅极和肖特基源极/漏极的高性能CMOS

High performance CMOS with metal-gate and Schottky source/drain
Abstract:
A semiconductor device having a metal/metal silicide gate and a Schottky source/drain and a method of forming the same are provided. The semiconductor device includes a gate dielectric overlying a semiconductor substrate, a metal or metal silicide gate electrode having a work function of less than about 4.3 eV or greater than about 4.9 eV overlying the gate dielectric, a spacer having a thickness of less than about 100 Å on a side of the gate electrode, and a Schottky source/drain having a work function of less than about 4.3 eV or greater than about 4.9 eV wherein the Schottky source/drain region overlaps the gate electrode. The Schottky source/drain region preferably has a thickness of less than about 300 Å.
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