- 专利标题: Semiconductor memory device
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申请号: US11197485申请日: 2005-08-05
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公开(公告)号: US07184318B2公开(公告)日: 2007-02-27
- 发明人: Hideaki Kurata , Kazuo Otsuga , Yoshitaka Sasago , Takashi Kobayashi , Tsuyoshi Arigane
- 申请人: Hideaki Kurata , Kazuo Otsuga , Yoshitaka Sasago , Takashi Kobayashi , Tsuyoshi Arigane
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 代理机构: Miles & Stockbridge P.C.
- 优先权: JP2004-240594 20040820
- 主分类号: G11C11/34
- IPC分类号: G11C11/34 ; G11C16/04
摘要:
Suppressing a leakage current is required in a flash memory because the channel length is made shorter with a reduction in the memory cell size. In an AND type memory array having an assist electrode, although the memory cell area has been reduced by the field isolation using a MOS transistor, leakage current in the channel direction becomes greater with a reduction in the memory cell size, resulting in problems arising like deterioration of programming characteristics, an increase in the current consumption, and reading failure. To achieve the objective, in the present invention, electrical isolation is performed by controlling at least one assist electrode of the assist electrodes wired in parallel to be a negative voltage during program and read operations and by making the semiconductor substrate surface in the vicinity of the aforementioned assist electrode non-conductive.
公开/授权文献
- US20060039195A1 Semiconductor memory device 公开/授权日:2006-02-23
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