A multi-loop circuit includes a first switching device to receive a first clock pulse and a second delayed pulse and produce a first output pulse including either the first clock pulse or the second delayed pulse. A first delay device receives the first output pulse and produces a first delayed pulse. A second switching device receives a second clock pulse and the first delayed pulse and produces a second output pulse including either the second clock pulse or the first delayed pulse. A second delay device receives the second output pulse and produces the second delayed pulse. A third switching device receives the first and second delayed pulses and produces a first output signal. A fourth switching device receives the first and second delayed pulses and produces a second output signal. A controller is coupled to control the first, second, third, and fourth switching devices.