Invention Grant
US07223657B2 Methods of fabricating flash memory devices with floating gates that have reduced seams
有权
制造具有减少接缝的浮动闸门的闪存装置的方法
- Patent Title: Methods of fabricating flash memory devices with floating gates that have reduced seams
- Patent Title (中): 制造具有减少接缝的浮动闸门的闪存装置的方法
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Application No.: US11240234Application Date: 2005-09-30
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Publication No.: US07223657B2Publication Date: 2007-05-29
- Inventor: Won-Jun Jang , Jung-Hwan Kim , Jai-Dong Lee , Young-sub You , Sang-Hun Lee , Hun-Hyeoung Leam
- Applicant: Won-Jun Jang , Jung-Hwan Kim , Jai-Dong Lee , Young-sub You , Sang-Hun Lee , Hun-Hyeoung Leam
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec
- Priority: KR10-2004-0078199 20041001
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
Methods of fabricating a floating gate of a flash memory cell are provided in which a first polysilicon layer is formed between first and second isolation layers. An upper region of the first polysilicon layer is then oxidized. The oxidized upper region of the first polysilicon layer is subsequently removed. A second polysilicon layer is formed on the first polysilicon layer. The second polysilicon layer and the first polysilicon layer are patterned to form the floating gate.
Public/Granted literature
- US20060073653A1 Methods of fabricating flash memory devices with floating gates that have reduced seams Public/Granted day:2006-04-06
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