Invention Grant
- Patent Title: DMOS device having a trenched bus structure
- Patent Title (中): 具有沟槽总线结构的DMOS器件
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Application No.: US11329870Application Date: 2006-01-10
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Publication No.: US07265024B2Publication Date: 2007-09-04
- Inventor: Hsin-Huang Hsieh , Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng
- Applicant: Hsin-Huang Hsieh , Chiao-Shun Chuang , Chien-Ping Chang , Mao-Song Tseng
- Applicant Address: TW Hsinchu
- Assignee: Mosel Vitelic, Inc.
- Current Assignee: Mosel Vitelic, Inc.
- Current Assignee Address: TW Hsinchu
- Agency: Townsend and Townsend and Crew LLP
- Priority: TW92110048A 20030429
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/3205 ; H01L21/4763 ; H01L21/336 ; H01L29/76

Abstract:
A DMOS device having a trench bus structure thereof is introduced. The trench bus structure comprises a field oxide layer formed on a P substrate, and a trench extending from an top surface of the field oxide layer down to a lower portion of the P substrate. A gate oxide layer and a polysilicon bus are formed to fill the trench as a main portion of the bus structure. In addition, an isolation layer and a metal line are formed atop the polysilicon bus and the field oxide layer. An opening is formed in the isolation layer to form connections between the polysilicon bus and the metal line. In specific embodiments, the bus trench and the gate trenches of the DMOS device are formed simultaneously, and the polysilicon bus and the gate electrode are formed simultaneously as well. Therefore, the bus structure is able to form the DMOS transistor without demanding any lithographic step for defining the position of the polysilicon bus.
Public/Granted literature
- US20060186465A1 DMOS device having a trenched bus structure Public/Granted day:2006-08-24
Information query
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